Design Of SPI IP To Communicate With I2c Bus Of A Microcontroller
Serial peripheral interface is one of the most com-monly used protocols for medium band -width data transfer.
Primarily developed by Motorola, it is used worldwide in many peripheral devices. With a focus on hand-shaking between
master and slave, this is an attempt to implement SPI protocol on FPGAs.
The purpose of this paper is to provide a full description of an upto-date SPI Master/Slave FPGA implementations. All
related issues, starting from the elaboration of initial specifications, till the final system verification, are comprehensively
discussed and justified.
The whole design code, either for synthesis or verification, is implemented in Verilog 2001 (IEEE 1365). The RTL code is
technology independent, achieving a transfer rate of 71 and 75MBPS for the Master and the Slave, respectively, when
mapped onto Xilinxs Virtex 5 FPGA devices.
Index Terms- Serial Peripheral Interface (SPI), Intellectual Property(IP), Inter-Integrated circuit(I2C).