Paper Title
Design and Implementation of LFSR (Linear Feedback Shift Register)

In this paper, memory architecture for ensuring data security is proposed. A Graphical User Interface (GUI) is assumed in the work to enter user ID and password for each user authentication. Valid user will be given access to the corresponding data. The architecture using Linear Feedback Shift Registers (LFSRs) is implemented and verified for the functionality.True Random Number Generator (TRNG) occupies position in various information security applications. Random numbers are the one which need to possess the properties of uniform distribution and statically independent. Diffused bit Generator (DBG) is a reliable entropy source and core component to produce the sequence of random bits. The power consumption is estimated using cadence virtuoso at 180nm technology. Simulation results have shown a power reduction of 10% with a mean error of 3% with respect to theoretical derivations. To validate the design transient analysis has been performed. Keywords - LFSR, cadence virtuoso, BIST, Low power.