Paper Title
A Novel Multirate Weighted Fir Filter Design Using VLSI

A new class of FIR filtering algorithms and VLSI architectures based on the multirate approach were recently proposed. They reduce the computational complexity in FIR filtering, and also retain attractive implementation related properties such as regularity and multiply-and-accumulate (MAC) structure. In addition, the multirate feature can be applied to low-power/high-speed VLSI implementation. These properties make the multirate FIR filtering very attractive in many DSP and communication applications. In this paper, we propose a novel adaptive filter based on this new class of multirate FIR filtering structures. The proposed adaptive filter inherits the advantages of the multirate structures such as low computational complexity and low-power/high-speed applications. Moreover, the multirate feature helps to improve the convergence property of the adaptive filter.