Design And Implementation Of Floating Point Multiplier And Square Root Of A Number By Vedic Mathematics Using VHDL
Vedic Mathematics deals mainly with various Vedic mathematical formulae and their application for carrying out
tedious and cumbersome arithmetical operations. The sutras (aphorisms) apply to and cover each and every part of each and
every branch of mathematics. The paper explains about UrdhvaTiryaka and vargamula sutras. UrdhvaTiryaka sutra deals
with the multiplication of two numbers and vargamula sutra deals with the square root of a number. These Sutras are used
for multiplication of two 16-bit precision floating point numbers and square root of 16-bit number respectively. The results
are observed on the Xilinx ISE simulator using VHDL codes.